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| EMC2101 SMBus Fan Control with 1C Accurate Temperature Monitoring PRODUCT FEATURES GENERAL DESCRIPTION The EMC2101 is an SMBus 2.0 compliant, integrated fan control solution complete with two temperature monitors, one external and one internal. Each temperature channel has programmable high limits that can assert an interrupt. The fan drive is selectable as a Pulse Width Modulator (PWM) or Linear (DAC) output. The fan control output, whether the PWM or DAC drive circuit, uses an eight position look-up table to allow the user to program the fan speed profile based on temperature. The DAC output ranges from 0V to VDD with up to 6 bit resolution while the PWM output has a range of 0% to 100% with up to 64 steps. The EMC2101 has an option to automatically upload the contents of an attached SMBus compatible EEPROM for auto-programming upon power up. Advanced thermal sensing enables reduced validation and characterization time as well as accurately operating with smaller-geometry processors. Resistance Error Correction (REC) automatically corrects the offset errors of board trace and device resistance, up to 100. Automatic Beta Compensation allows the user the flexibility to design applications that include processor substrate transistors. Datasheet FEATURES Automatic Beta Compensation Resistance Error Correction Self-programming with available SMBus compatible EEPROM Selectable PWM or DAC fan driver output Temperature Monitors -- External channel 1C accuracy -- Internal channel 2C accuracy 3.3 Volt Operation (5 Volt Tolerant Input Buffers) SMBus 2.0 Compliant Interface, supports TIMEOUT 8-Pin MSOP Lead-free RoHS Compliant Packages 8-Pin SOIC Lead-free RoHS Compliant Package APPLICATIONS Graphics Processors Embedded Application Fan Drive PWM Controller + Temp Sensor BLOCK DIAGRAM VDD EMC2101 Address Pointer Register Switching Current Conversion Rate Register Limit Comparator Internal High Limit Register External High Limit Register External TCRIT Limit Register DP Analog Mux DN Internal Temp Diode ADC External Temperature Register Internal Temperature Register Fan Control Look-Up Table Configuration Register SMBus Interface SMCLK SMDATA ALERT / TACH PWM Driver FAN DAC Driver Fan Control Logic GND Status Registers Interupt Masking SMSC EMC2101 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet ORDER NUMBERS: EMC2101-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE EMC2101-R-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE EMC2101-ACZT-TR FOR 8 PIN, SOIC LEAD-FREE ROHS COMPLIANT PACKAGE REEL SIZE IS 4,000 PIECES 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 2.53 (03-13-07) 2 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table of Contents Chapter 1 Device Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 2 Pin Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 2.2 Pin Diagram for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Description for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 3.2 3.3 3.4 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 SMBus Client Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 EEPROM Loader Electrical Specifications (EMC2101-R only) . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Chapter 4 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receive Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Time-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming from EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 15 15 15 15 16 16 16 Chapter 5 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 5.2 5.3 5.4 Modes of Operation (EMC2101-R Only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up (EMC2101-R Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT / TACH Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.1 ALERT / TACH as a Temperature Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.2 ALERT / TACH as an Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.3 Mask Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.1 Temperature Measurement Results and Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.2 Temperature Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.3 Beta Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.4 Resistance Error Correction (REC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.5 Programmable Ideality Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5.6 Diode Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.1 DAC Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.2 PWM Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.3 TACH Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.4 Fan Control Look-Up Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 20 20 21 21 21 22 24 25 25 25 25 26 26 26 26 26 5.5 5.6 Chapter 6 Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1 6.2 6.3 6.4 6.5 6.6 Data Read Interlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conversion Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 31 31 32 32 33 34 SMSC EMC2101 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20 6.21 6.22 6.23 6.24 6.25 6.26 Temperature Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Temperature Force Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . One Shot Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scratchpad Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Alert Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Ideality Factor Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Beta Compensation Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TACH Reading Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TACH Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Spin Up Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Setting Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM Frequency Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM Frequency Divide Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Control Look-Up Table Hysteresis Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fan Control Look-Up Table Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Averaging Filter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Manufacturer ID Register (FEh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision Register (FFh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 35 36 36 36 37 38 39 39 40 41 42 43 43 44 45 46 47 47 47 Appendix A Advanced PWM Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Appendix B TACH Reference Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Chapter 7 Package Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Revision 2.53 (03-13-07) 4 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet List of Figures Figure 2.1 Figure 4.1 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 5.5 Figure 5.6 Figure 5.7 Figure 5.8 Figure 9.1 Figure 9.2 EMC2101 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 System Diagram for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 System Diagram for EMC2101-R. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Block Diagram of Temperature Monitoring Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 External Diode configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Temperature Filter Impulse Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Fan Control Look-Up Table Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Example Fault Queue Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8 PIN MSOP / TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 8 PIN SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 SMSC EMC2101 5 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet List of Tables Table 1.1 Device Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2.1 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3.3 SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3.4 EEPROM Loader Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 4.1 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 4.2 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 4.3 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.4 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.5 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.6 Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.7 Block Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 5.1 ALERT/ TACH Pull-up Resistors - SMBus / FAN MODE for EMC2101-R. . . . . . . . . . . . . . . . 20 Table 5.2 EMC2101 External Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 5.3 EMC2101 Internal Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 6.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6.2 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6.3 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6.4 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.5 Conversion Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.6 Conversion Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.7 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.8 External Diode Force Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.9 One Shot Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6.10 Scratchpad Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6.11 Alert Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6.12 External Ideality Factor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 6.13 Ideality Factor Look-Up Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 6.14 Beta Compensation Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6.15 CPU Beta Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6.16 TACH Reading Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 6.17 TACH Reading Low Byte Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 6.18 Fan Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 6.19 TACH Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.20 Fan Spin Up Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.21 Spin-Up Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.22 Spin-Up Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 6.23 Fan Setting Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 6.24 PWM Frequency Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 6.25 PWM Frequency Divide Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 6.26 Examples of Fan PWM Frequency with Maximum Resolution . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 6.27 Look Up Table Hysteresis Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 6.28 Fan Control Look Up Table Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 6.29 Averaging Filter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 6.30 Averaging Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 6.31 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 6.32 Manufacturer ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 6.33 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 6.34 Fan Effective Duty Cycle Resolution and Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 6.35 Example TACH Decode 10k RPM to 1k RPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Revision 2.53 (03-13-07) 6 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 1 Device Selection The EMC2101 is available with the following options and configurations as shown in Table 1.1. Table 1.1 Device Selection PART NUMBER EMC2101 - 1 EMC2101 - R FAN OPERATION PWM Drive, 0% drive Selected via pull-up COMMUNICATIONS SMBus Selected via pull-up PACKAGE 8 pin SOIC and 8 pin MSOP 8 pin MSOP PRODUCT ID 16h 28h SMSC EMC2101 7 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 2 Pin Layout 2.1 Pin Diagram for EMC2101 VDD DP DN FAN 1 2 3 4 EMC2101 8 7 6 5 SMCLK SMDATA ALERT / TACH GND Figure 2.1 EMC2101 Pinout 2.2 Pin Description for EMC2101 Table 2.1 Pin Description PIN 1 2 3 4 NAME VDD DP DN FAN FUNCTION 3.3V Power supply External diode positive (anode) connection External diode negative (cathode) connection PWM Output (default - software programmed) DAC Output software programmed Power Analog Input Analog Input TYPE Open Drain Output (5V) Analog Output Power Open Drain Output (5V) 5 6 GND ALERT / TACH Ground ALERT - Open drain I/O operates as active low interrupt or TACH input requires pull-up resistor, which defines auto-configuration mode (see Table 5.1) TACH - TACH input Digital Input (5V) Digital Input / Open-Drain Output (5V) Digital Input / Open-Drain Output (5V) 7 8 SMDATA SMCLK SMBus Data input/output SMBus Clock input Note: All pins labelled with (5V) are 5V tolerant. Revision 2.53 (03-13-07) 8 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 3 Electrical Specifications 3.1 Absolute Maximum Ratings Table 3.1 Absolute Maximum Ratings DESCRIPTION Supply Voltage (VDD) Voltage on SMDATA and SMCLK pins Voltage on any other pin to Ground Operating Temperature Range Storage Temperature Range Lead Temperature Range Package Thermal Characteristics for MSOP-8 Thermal Resistance Package Thermal Characteristics for SOIC-8 Thermal Resistance ESD Rating, All pins HBM 135.9 2000 C/W V 140.8 C/W RATING -0.3 to 5.0 -0.3 to 5.5 -0.3 to VDD +0.3 -40 to 125 -55 to 150 Refer to JEDEC Spec. J-STD020 UNIT V V V C C Note: Stresses above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. When powering this device from laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. If this possibility exists, it is suggested that a clamp circuit be used. 3.2 Electrical Specifications Table 3.2 Electrical Specifications VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC SYMBOL MIN TYP MAX DC Power UNIT CONDITIONS Supply Voltage Supply Current Supply Current VDD IDD IDD 3.0 3.3 0.6 200 3.6 1 V mA uA 16 conversion / second - PWM or DAC driver operational 1 conversion / 16 seconds - PWM driver operational SMSC EMC2101 9 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 3.2 Electrical Specifications (continued) VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC Supply Current Supply Current Standby Current SYMBOL IDD IDD ISTANDBY MIN TYP 300 300 TBD 180 MAX UNIT uA uA A CONDITIONS 1 conversion / 16 seconds - DAC Driver, no load Temp monitoring Disabled, DAC Driver enabled, no load PWM disabled, Monitoring disabled Internal Temperature Monitor Temperature Accuracy Temperature Resolution Conversion Time Internal Channel tCONV 1 1 3 2 C C ms 8 bit resolution External Temperature Monitor Temperature Accuracy 0.5 1 Temperature Resolution Conversion Time External Channel Diode Decoupling Capacitor Diode Decoupling Capacitor Resistance Error Correction tCONV CFILTER CFILTER RSERIES 100 TACH Measurement TACH Accuracy Fan Counter Clock Frequency 90 10 % kHz TACH valid 0.125 21 2.2 470 1 3 C C C ms nF pF Connected across External Diode (2N3904) Connected across Substrate Transistor (CPU diode) Series resistance in DP and DN lines 60C < TDIODE < 100C, 10C < TA < 70C 0C < TDIODE < 125C 11 bit resolution Pulse Width Modulator Fan Driver PWM Resolution PWM Frequency fPWM 22 64 5k steps Hz For 64 steps, higher frequencies are possible with reduced resolution. See Section 6.34. PWM Duty cycle DPWM 0 100 DAC Fan Driver % Output Voltage Drive VDAC 0.2 VDD - 0.2 V Current Load = 1mA Revision 2.53 (03-13-07) 10 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 3.2 Electrical Specifications (continued) VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC Total Unadjusted Error DAC Resolution Settling Time to within 1% tSETTLE SYMBOL TUE MIN TYP 5 6 40 MAX UNIT % bits us Capacitive Load = 100pF CONDITIONS Measured at 3/4 full scale Digital I/O pins (PWM, SMDATA, SMCLK, ALERT / TACH) Output High Voltage Output Low Voltage Output Leakage Current VOH VOL ILEAK VDD 0.3 0.3 10 V V uA 8mA Current Source 8mA Current Sink 3.3 SMBus Client Electrical Specifications Table 3.3 SMBus Electrical Specifications VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC SYMBOL MIN TYP MAX UNITS CONDITIONS SMBus Interface Input High Voltage Input Low Voltage Input High/Low Current Hysteresis Input Capacitance Output Low Sink Current CIN VIH VIL IIH / IIL -1 500 5 8 SMBus Timing Clock Frequency Spike Suppression Bus free time Start to Stop Hold Time: Start Setup Time: Start Setup Time: Stop Data Hold Time Data Setup Time fSMB tSP tBUF tHD:STA tSU:STA tSU:STO tHD:DAT tSU:DAT 1.3 0.6 0.6 0.6 0.3 100 10 400 50 kHz ns us us us us us ns 2.1 0.8 1 V V uA mV pF mA VOL = 0.4V SMSC EMC2101 11 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 3.3 SMBus Electrical Specifications (continued) VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC Clock Low Period Clock High Period Clock/Data Fall time Clock/Data Rise time Capacitive Load Note 3.1 SYMBOL tLOW tHIGH tFALL tRISE CLOAD MIN 1.3 0.6 300 300 400 TYP MAX UNITS us us ns ns pF Min = 20+0.1CLOAD ns Min = 20+0.1CLOAD ns (Note 3.1) per bus line CONDITIONS 300ns rise time max is required for 400kHz bus operation. For lower clock frequencies the maximum rise time is (0.1 / fSMB)+ 50ns. 3.4 EEPROM Loader Electrical Specifications (EMC2101-R only) Table 3.4 EEPROM Loader Electrical Specifications VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC SYMBOL MIN TYP MAX UNITS CONDITIONS Interface Input High Voltage Input Low Voltage Input High/Low Current Hysteresis Input Capacitance Output Low Sink Current CIN VIH VIL IIH / IIL -1 500 5 8 Timing Loading Delay Loading Time Clock Frequency Spike Suppression Bus free time Start to Stop Hold Time: Start Setup Time: Start Setup Time: Stop Data Hold Time tDLY tLOAD fSMB tSP tBUF tHD:STA tSU:STA tSU:STO tHD:DAT 1.3 0.6 0.6 0.6 0.3 10 50 50 50 ms ms kHz ns us us us us us Delay after power-up until EEPROM loading begins. (See Section 4.9.) 2.1 0.8 1 V V uA mV pF mA VOL = 0.4V Revision 2.53 (03-13-07) 12 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 3.4 EEPROM Loader Electrical Specifications (continued) VDD = 3.0V to 3.6V, TA = 0oC - 85oC, Typical values are at TA = 27C unless otherwise noted CHARACTERISTIC Data Setup Time Clock Low Period Clock High Period Clock/Data Fall time Clock/Data Rise time Capacitive Load SYMBOL tSU:DAT tLOW tHIGH tFALL tRISE CLOAD MIN 100 1.3 0.6 300 300 400 TYP MAX UNITS ns us us ns ns pF Min = 20+0.1CLOAD ns Min = 20+0.1CLOAD ns per bus line CONDITIONS SMSC EMC2101 13 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 4 System Management Bus Interface Protocol 4.1 System Management Bus Interface Protocol The EMC2101 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 4.1. Stretching of the SMCLK signal is supported, however the EMC2101 will not stretch the clock signal. The EMC2101 powers up as an SMBus client (after loading from EEPROM as applicable). TLOW THIGH THD:STA TSU:STO SMCLK THD:STA TRISE TFALL THD:DAT TSU:DAT TSU:STA SMDTA TBUF P S S - Start Condition S P - Stop Condition P Figure 4.1 SMBus Timing Diagram The EMC2101 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Receive Byte and the Alert Response Address as valid protocols as shown below. All of the below protocols use the convention in Table 4.1. Table 4.1 Protocol Format DATA SENT TO DEVICE # of bits sent DATA SENT TO THE HOST # of bits sent 4.2 Write Byte The Write Byte is used to write one byte of data to the registers as shown below Table 4.2: Table 4.2 Write Byte Protocol SLAVE ADDRESS 7 REGISTER ADDRESS 8 REGISTER DATA 8 START 1 WR 1 ACK 1 ACK 1 ACK 1 STOP 1 Revision 2.53 (03-13-07) 14 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 4.3 Read Byte The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3. Table 4.3 Read Byte Protocol START SLAVE ADDRESS WR ACK Register Address ACK START Slave Address RD ACK Register Data NACK STOP 1 7 1 1 8 1 1 7 1 1 8 1 1 4.4 Send Byte The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 4.4. Table 4.4 Send Byte Protocol SLAVE ADDRESS 7 REGISTER ADDRESS 8 START 1 WR 1 ACK 1 ACK 1 STOP 1 4.5 Receive Byte The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 4.5. Table 4.5 Receive Byte Protocol SLAVE ADDRESS 7 START 1 RD 1 ACK 1 REGISTER DATA 8 NACK 1 STOP 1 4.6 Alert Response Address The ALERT / TACH output can be used as a processor interrupt or as an SMBus Alert when configured to operate as an interrupt. When it detects that the ALERT / TACH pin is asserted, the host will send the Alert Response Address (ARA) to the general address of 000_1100b. All devices with active interrupts will respond with their client address as shown in Table 4.6. Table 4.6 Alert Response Address Protocol ALERT RESPONSE ADDRESS 7 START 1 RD 1 ACK 1 DEVICE ADDRESS 8 NACK 1 STOP 1 SMSC EMC2101 15 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet The EMC2101 will respond to the ARA in the following way when the ALERT / TACH pin is configured as an Interrupt: 1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication from the device was not prematurely stopped due to a bus contention event). 2. Set the MASK bit to clear the ALERT / TACH pin only if there are no bits set in the Status Register. If there are error condition bits set in the Status Register, it must be read before the MASK bit will be set. When the ALERT / TACH pin is configured to operate in Comparator Mode, or as a TACH input, (see Section 5.4.1), it will not respond to the ARA command. Additionally, the EMC2101 will not respond to the ARA command if the ALERT / TACH pin is not asserted. 4.7 SMBus Address The EMC2101 is addressed on the SMBus as 100_1100b. Attempting to communicate with the EMC2101 SMBus interface with an invalid slave address or invalid protocol will result in no response from the device and will not affect its register contents. 4.8 SMBus Time-out The EMC2101 includes an SMBus time-out feature. Following a 25ms period of inactivity on the SMBus, the device will time-out and reset the SMBus interface. 4.9 Programming from EEPROM The BondA acts as a simple SMBus Master to read data from a connected EEPROM using the following procedure: 1. After power-up the BondA waits for 10ms with the SMDATA and SMCLK pins tri-stated. 2. Once the wait period has elapsed, the BondA sends a START signal followed by the 7 bit client address 101_0000b followed by a `1b' and waits for an ACK signal from the EEPROM. 3. When the EEPROM sends the ACK signal, the BondA will send a second start signal and continue sending the Block Read Command (see Table 4.7) to the same slave address. It reads 256 data bytes from the EEPROM sending an ACK between each data byte. When 256 data bytes have been received, it sends a NACK signal followed by a STOP bit. 4. Resets the device as an SMBus Client. If the BondA does not receive an acknowledge bit from the EEPROM then the following will occur: 1. The ALERT / TACH pin will be asserted and will remain asserted until a Host device initiates communication with the EMC2101 and reads the Status Register at offset 0x02. The ALERT / TACH pin will be de-asserted after a single Status Register read, i.e. it is not sticky. 2. The BondA will reset its SMBus protocol as a slave interface and start operating from the default conditions. Revision 2.53 (03-13-07) 16 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 4.7 Block Read Byte Protocol START SLAVE ADDRESS 7 WR ACK Register Address 8 ACK START SLAVE ADDRESS 7 RD ACK Register Data 8 ... 1 1 1 1 1 1 1 ... ACK Register Data (00h) 8 ACK Register Data (01h) 8 ACK Register Data (02h) 8 ... ACK Register Data (FFh) 8 NACK STOP 1 1 1 ... 1 1 1 Note: The shaded columns represent data sent from the EMC2101 to the EEPROM device. APPLICATION NOTE: It is recommended that the EEPROM that is used be an AT24C02B or equivalent device. The EEPROM slave address must be 101_0000b. The device must support a block-read command, 8-bit addressing, and 8-bit data formatting using a 2-wire bus. The device must support 3.3V digital switching logic and may not pull the SMCLK and SMDATA pins above 5V. Data must be transmitted MSB first. APPLICATION NOTE: No other SMBus Master should exist on the SMDATA and SMCLK lines. The presence of another SMBus Master will cause errors in reading from the EEPROM. The EEPROM should be loaded to mirror the register set of the EMC2101 with the desired configuration set. All undefined registers in the EMC2101 register set should be loaded with 00h in the EEPROM. Likewise, all registers that are read-only in the EMC2101 register set should be loaded with 00h in the EEPROM. Because of the interaction between the Fan Control Look-up Table and the Fan Configuration Register, the EEPROM Loader stores the contents of the Fan Configuration Register and updates this register at the end of the EEPROM loading cycle. (See Section 6.16 and Section 6.22). SMSC EMC2101 17 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 5 General Description The EMC2101 is an environmental monitoring device with a selectable PWM or DAC fan driver output, one external temperature monitoring channel and one internal temperature monitor. It contains advanced circuitry to remove errors induced by series resistance and CPU thermal diode process differences to provide accurate temperature measurements and accurate fan control. Thermal management is performed automatically. The EMC2101 reads the temperature from both the external and internal temperature diodes and uses the external temperature data to control the fan speed. The FAN output can be configured as a PWM (default) or DAC output. The PWM fan driver uses an eight entry look up table to create a programmable temperature response. The DAC output provides a linear drive for the system fan circuit using this same look up table. Each temperature measurement channel is continuously compared against programmed high limits. The external diode channel is compared against a programmed low limit. ALERT / TACH interrupt pin is asserted if the measured value exceeds the high limit or drops below the low limit. In addition, the external diode contains a programmable critical temperature, TCRIT. If the measured temperature exceeds this TCRIT an interrupt is asserted on the ALERT / TACH pin and the fan is set to full on. Finally, the EMC2101-R (only) has two configuration modes and two default fan settings based on the value of the pull-up-resistor on the ALERT / TACH pin. In the Manual Configuration Mode, the device acts as an SMBus client and waits to be configured by the system SMBus host. In the Automatic Configuration mode, the device automatically queries the SMBus for an EEPROM device and uploads configuration information from the EEPROM into its internal registers. Figure 5.1 shows a system level block diagram of the EMC2101. Figure 5.2 shows a system level block diagram of the EMC2101-R. EMC2101 DP Thermal diode DN Internal Diode SMCLK SMDATA ALERT FAN HOST SMBus Interface Fan Drive Circuitry Figure 5.1 System Diagram for EMC2101 Revision 2.53 (03-13-07) 18 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet EMC2101-R SMBus Client EEPROM Loader DP Thermal diode DN Internal Diode ALERT FAN SMCLK SMDATA EEPROM or Host GPU Fan Drive Circuitry Figure 5.2 System Diagram for EMC2101-R 5.1 Modes of Operation (EMC2101-R Only) The EMC2101-R has two modes of operation based on the pull-up resistor on the ALERT pin (see Table 5.1). The modes of operation are: 1. Host Configuration Mode - An SMBus Host configures the EMC2101-R upon startup to allow for polling for temperature or fan information or the user can use the ALERT pin interrupt to determine which action is required. 2. Automatic Configuration Mode - The EMC2101-R queries an SMBus compatible EEPROM located at a known address (see Section 4.9) and automatically loads its registers with the contents of the EEPROM. This mode does not require host intervention but a host can poll the device for temperature and fan information. 5.2 Power Up (EMC2101-R Only) The EMC2101-R (only) will power up with the fan driver set to either 100% duty cycle or 0% duty cycle, depending on the value of the pull-up resistor on the ALERT / TACH pin. (See Table 5.1.) It will remain in this state until either the Fan Setting Register is written or until the following activities have occurred: 1. The Fan Control Look-Up Table is loaded and the PROG bit is set to `0' 2. The temperature monitoring block performs its first comparison against the Look-Up Table. If the Fan Control Look-Up Table is used, the EMC2101-R Fan Driver will be immediately set to the appropriate setting in the table based on the measured temperature. 5.3 Power Modes The EMC2101 supports multiple power modes that are user configurable. The temperature monitoring and fan control functions of the device are independent. The power modes are: 1. Normal - the temperature monitoring and fan driver circuits are both active. The device updates all temperature channels at the user programmed conversion rate (see Table 6.6). Every time the temperature is updated, the limits are checked and the fan driver is updated based on the values in the Fan Control Look-Up Table (if the Fan Control Look-Up Table is enabled). 2. Standby - the temperature monitoring and fan driver circuits are both disabled. The device will not update temperature data automatically and the fan output will be set to default drive. A one-shot SMSC EMC2101 19 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet command can be issued that will refresh the temperature data. The limits are only checked when the temperature data is updated. 3. Mixed - the temperature monitoring block is disabled, but the fan driver block is active. The device will not update temperature data automatically and the fan driver output will not be updated automatically based on temperature. A one-shot command can be issued that will refresh the temperature data and update the fan driver based on the values in the Fan Control Look-Up Table (if the Fan Control Look-Up Table is enabled). 5.4 ALERT / TACH Output The ALERT / TACH pin (Pin 6) is an open drain output and requires a pull-up resistor to VDD when configured as an ALERT output. APPLICATION NOTE: When configured as a TACH input, the ALERT / TACH pin will not function as an ALERT output. Error conditions will not trigger an interrupt (though will be updated in the Status Registers as normal) and the MASK bits will do nothing. Likewise, the device will not respond to the ARA command. For the EMC2101 - R, the value of this pull-up resistor determines the initial FAN output mode of operation as well as whether the device auto loads from an EEPROM or via an SMBus host per Table 5.1. After power-up, the EMC2101-R requires 10ms to initialize and determine the operating mode. When configured as an interrupt, the ALERT / TACH pin is maskable for each alert condition. If the ALERT / TACH pin is masked, then it will not respond to the corresponding condition (though the Alert Status Register will update normally). This pin has multiple functions described below and is controlled by ALERT_COMP bit (bit 0) in the Averaging Filter Register (BFh) (see Section 6.23). Table 5.1 ALERT/ TACH Pull-up Resistors - SMBus / FAN MODE for EMC2101-R POLARITY BIT SETTING (SEE Section 6.16) 1 0 1 0 ALERT / TACH PULL-UP RESISTOR 5.6k Ohm 5% 10k Ohm 5% 18k Ohm 5% 33k Ohm 5% SMBUS MODE Host Load via SMBus Host Load via SMBus Auto Load via EEPROM Auto Load via EEPROM FAN MODE FAN output initialize to 100% Duty Cycle FAN output initialize to 0% Duty Cycle FAN output initialize to 100% Duty Cycle FAN output initialize to 0% Duty Cycle 5.4.1 ALERT / TACH as a Temperature Comparator When the ALERT / TACH pin is used as a temperature comparator, the ALERT / TACH output is asserted when an out of limit measurement (> high limit, < low limit, or > TCRIT limit) is detected on any diode (low limits only apply to the external diode channel) or when the external diode connections are open. When the condition is no longer true, the ALERT / TACH output will de-assert. Reading from the Status Register will cause the ALERT / TACH pin to be released however it will not prevent it from being re-asserted based on the temperature comparisons. Setting the MASK bit will not affect the ALERT / TACH pin when it is configured as a temperature comparator, however the individual channel mask bits will block the ALERT / TACH pin from being asserted. Revision 2.53 (03-13-07) 20 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 5.4.2 ALERT / TACH as an Interrupt When the ALERT / TACH pin is used as an interrupt signal the pin is asserted whenever an out-oflimit condition is detected. The ALERT / TACH pin will remain asserted until it is cleared even if the error condition is removed. 5.4.3 Mask Bit The MASK bit behaves differently depending on which mode the ALERT / TACH pin is configured to operate in. If the EMC2101 is configured with the ALERT / TACH pin operating in Interrupt Mode, the MASK bit will be set in the following cases: 1. Automatically after the Status Register has been read if any bits in the Status Register have been set (except BUSY and FAULT) (See Table 6.3). 2. Automatically when the EMC2101 responds to an Alert Response Address (ARA) command on an SMBus and the ALERT / TACH pin is asserted. The ARA command does not clear the Status Register. If the MASK bit is cleared prior to reading and clearing the Status Register, then the ALERT / TACH pin will be asserted. 3. Directly via the SMBus. In Interrupt Mode, the MASK bit will block the ALERT / TACH pin from being asserted in response to an error condition. If the EMC2101 is configured with the ALERT / TACH pin operating in Comparator Mode, the MASK bit can only be set via the SMBus. In this mode, setting the MASK bit willl not affect the ALERT / TACH pin. In either mode, setting the individual channel mask bits will block the appropriate channel from asserting the ALERT / TACH pin. 5.5 Temperature Monitors In general, thermal diode temperature measurements are based on the change in forward bias voltage of a diode when operated at two different currents. The change in forward bias voltage is proportional to absolute temperature (T). Where: k = Boltzmann's constant VBE = VBE _ HIGH - VBE _ LOW = kT I ln HIGH I q LOW T = Absolute Temperature in Kelvin q = electron charge Eq: [1] = Diode Ideality Factor SMSC EMC2101 21 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet . IHIGH ILOW CPU substrate PNP Resistance Error Correction Input Filter & Sampler ADC Figure 5.3 Block Diagram of Temperature Monitoring Circuit Figure 5.3 shows a block diagram of the temperature measurement circuit. As shown, the EMC2101 incorporates a delta-sigma analog to digital converter that integrates the temperature diode voltage from multiple bias currents. The external temperature diodes can be connected as shown in Figure 5.4. to DP to DN to DP to DP to DN Local Ground Typical remote substrate transistor i.e. CPU substrate PNP Typical remote discrete PNP transistor i.e. 2N3906 Typical remote discrete NPN transistor i.e. 2N3904 to DN Figure 5.4 External Diode configurations 5.5.1 Temperature Measurement Results and Data The results of the internal and external temperature measurements are stored in the internal and external temperature registers respectively. These are then compared with the values stored in the High Limit Registers. The internal temperature measurements are stored in 8-bit format while the external temperature measurements are stored in 11-bit format. Revision 2.53 (03-13-07) 22 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet The EMC2101 measures temperatures from -64C to 127C represented as a binary two's complement number. Internal temperatures are in 1C steps, external temperatures are in 0.125C steps. Table 5.2 shows the temperature format for the external diode and Table 5.3 shows the temperature format for the internal diode. Table 5.2 EMC2101 External Temperature Data Format TEMPERATURE (C) <= -64 -55 -1 -0.125 0 0.125 1 25 125 >= 127.875 Diode Fault (Open condition) Diode Fault (Short condition) DIGITAL OUTPUT (BINARY) 1100 1100 1111 1111 0000 0000 0000 0001 0111 0111 0111 0111 0000 1001 1111 1111 0000 0000 0001 1001 1101 1111 1111 1111 000 000 000 111 000 001 000 000 000 110 000 111 Table 5.3 EMC2101 Internal Temperature Data Format TEMPERATURE (C) <= -64 -55 -1 0 1 25 125 126 >= 127 DIGITAL OUTPUT (BINARY) 1100 1100 1111 0000 0000 0001 0111 0111 0111 0000 1001 1111 0000 0001 1001 1101 1110 1111 SMSC EMC2101 23 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 5.5.2 Temperature Filter The EMC2101 contains variable filtering options to suppress thermally or electrically noisy signals on the External Diode lines. This filter can be configured as Level 1, Level 2, or Disabled (see Section 6.23). The typical filter performance is shown in Figure 5.5 and Figure 5.6. Filter Step Response 90 Temperature (C) 80 70 60 50 40 30 20 10 0 0 2 4 6 Samples 8 10 12 14 Disabled Level1 Level2 Figure 5.5 Temperature Filter Step Response Filter Impulse Response 90 80 Temperature (C) 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 Samples Figure 5.6 Temperature Filter Impulse Response Disabled Level1 Level2 Revision 2.53 (03-13-07) 24 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 5.5.3 Beta Compensation The EMC2101 is software configurable to monitor the temperature of basic diodes (e.g. 2N3904), or CPU thermal diodes. It automatically detects the type of external diode (CPU diode, diode connected transistor, or PN diode) and determines the optimal setting to reduce temperature errors introduced by beta variation. 5.5.4 Resistance Error Correction (REC) Parasitic resistance in series with the external diode limits the accuracy obtainable from temperature measurement devices. The voltage developed across this resistance by the switching diode currents cause the temperature measurement to read higher than the true temperature. Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error caused by series resistance is +0.7C per ohm. Temperature errors caused by up to 100 of series resistance are automatically corrected. 5.5.5 Programmable Ideality Factor The EMC2101 is designed for an external diode with an ideality factor of 1.008. When an external diode, processor or discrete, has a different ideality factor, an error is introduced in the temperature measurement which must be corrected. This is typically done using programmable offset registers but this correction is only accurate at one temperature since an ideality factor mismatch introduces an error that is a linear function of temperature. To provide maximum flexibility to the user, the EMC2101 provides a 6-bit register to set the ideality factor for the external diode which eliminates errors across all temperatures. (See Table 6.13.) APPLICATION NOTE: This feature is only required in rare circumstances. The majority of errors introduced are correced with the Beta Compensation and Resistance Error Correction circuitry. 5.5.6 Diode Faults The EMC2101 detects the major types of diode faults; an open input DP-DN, a short across DP-DN, short to GND, and short to VDD. For each temperature measurement made, the device checks for a diode fault on the external diode. If an open fault or a short of the DP pin to VDD is detected, then the temperature data is changed to +127C and the Fault bit in the Status Register will bet set. If the high and / or TCRIT limits are set below this value, and they are not masked, then the ALERT / TACH pin will be asserted. In addition, the HIGH and TCRIT status bits will be set accordingly. If a short between the diode pins or a short to GND is detected, then the temperature data is changed to +127.875C. If the high and / or TCRIT limits are set below this value, and they are not masked, then the ALERT / TACH pin will be asserted. In addition, the HIGH and TCRIT status bits will be set accordingly. The FAULT bit will not be set. APPLICATION NOTE: If the Temperature Filter is enabled and a diode fault occurs, the diode fault status bit will be set and the temperature data is updated immediately. The Filter will stop accumulating data so long as the diode fault remains in effect. APPLICATION NOTE: When a Diode Fault is detected, the ALERT / TACH pin behavior is still subject to the Fault Queue. SMSC EMC2101 25 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 5.6 Fan Control The EMC2101 includes either a PWM or a linear DAC based fan driver on the shared FAN pin. Both PWM and DAC use the Fan Control Look-Up Table and/or Fan Setting Register interchangeably as well as the Spin-Up Routine. In addition, the EMC2101 can monitor the fan speed using the ALERT / TACH pin. 5.6.1 DAC Driver The Linear DAC driver included in the EMC2101 has 6-bits of resolution based on the supply voltage and is used for linear drive fan circuits. Its advantages over PWM drive circuits include reduced circuit complexity at the expense of reduced effective signal range. APPLICATION NOTE: When using the DAC Driver, the pull-up resistor on the FAN pin should be removed. APPLICATION NOTE: The DAC driver output voltage is controlled by either the Fan Setting Register (see Section 6.18) or the Fan Control Look-Up Table Registers (see Section 6.22). It is also controlled by the POLARITY bit (see Section 6.16). The PWM Frequency Register (see Section 6.19) and PWM Divider Register (see Section 6.20) have no effect on the DAC's output voltage range, resolution, or response. 5.6.2 PWM Driver The PWM driver included in the EMC2101 has, at most, 64 steps equalling 1.5% resolution. The effective resolution, duty cycle, and frequency are all adjustable based on programmed values. It's advantages over linear drive circuits include a large signal range (0% to 100% duty cycle) at the expense of added complexity on the drive circuit. The PWM output is open drain and requires a pull-up resistor to VDD. 5.6.3 TACH Monitor The TACH monitor counts the number of clock pulses that occur between five edges of the TACH signal. The monitor assumes that the tachometer signal is always valid (such as generated from a 4wire fan or a direct drive fan) and that the tachometer signal generates 2 TACH pulses per fan revolution. 5.6.4 Fan Control Look-Up Table The EMC2101 uses an 8 entry look-up table to apply a user-programmable fan control profile based on measured temperature. The user programs the Fan Control Look-Up Table using incrementally higher temperatures and the desired fan output that should be set when that temperature is reached. If the measured temperature on the External Diode channel exceeds any of these temperature thresholds, the fan output will be automatically programmed to the desired setting corresponding to the exceeded temperature. When the measured temperature drops to a point below any lower threshold minus the hysteresis value, the fan output will be set to the corresponding lower set point. Figure 5.7 shows an example of this operation. Revision 2.53 (03-13-07) 26 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Temp T6 T6 - Hyst T5 T5 - Hyst T4 T4 - Hyst Averaged Temperature Fan Setting S6 S5 S4 T3 T3 - Hyst Fan Setting S3 S2 T2 T2 - Hyst T1 Measurement taken S1 Time Figure 5.7 Fan Control Look-Up Table Example If the Fan Control Look-Up Table is not used, the user may program the fan output directly by writing to the Fan Setting Register (4Ch - see Section 6.18). SMSC EMC2101 27 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 5.7 Fault Queue The EMC2101 supports a Fault Queue feature to reduce interrupts caused by spurious temperature readings. This feature, (see Section 6.5), will not trigger an interrupt until the device has measured three consecutive out-of-limit HIGH, LOW, or T_CRIT temperature readings. Figure 5.8 shows an example of this behavior. The Fault Queue only applies to the External Diode channels. Temp 2 consecutive errors TLIMIT 3 consecutive errors Status Register ETDS high n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 Readings Figure 5.8 Example Fault Queue Response Revision 2.53 (03-13-07) 28 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Chapter 6 Register Set The following registers are accessible through the SMBus Interface. The registers are described in functional order. Registers with multiple addresses are included for software compatibility. Writing or reading from either address will point to the same internal register. Table 6.1 Register Set in Hexadecimal Order REGISTER ADDRESS 00h 01h 02h 03h and 09h R R R R/W DEFAULT VALUE 00h 00h 00h 00h R/W REGISTER NAME Internal Temperature External Diode Temperature High Byte Status Configuration FUNCTION Stores the Internal Temperature Stores the External Temperature High Byte Reports internal, external, and TCRIT alarms Alert Mask, STANDBY, TCRIT override, Alert Fault Queue Sets conversion rate ALERT / TACH asserted if measured temp above this value ALERT / TACH asserted if measured temp above this value ALERT / TACH asserted if measured temp below this value Force the temperature for determining the next fan speed used in the Fan Control Look-Up Table When written, performs a one-shot conversion. Stores the External Temperature Low Byte Scratchpad - This register is read/write but does nothing Scratchpad - This register is read/write but does nothing Fractional data of High Limit Fractional data of Low Limit Disables alarms 29 PAGE Page 32 Page 32 Page 32 Page 33 04h and 0Ah 05h and 0Bh R/W R/W Conversion Rate Internal Temp Limit 08h (16 / sec) 46h (70C) 46h (70C) 00h (0C) 00h Page 34 Page 35 07h and 0Dh 08h and 0Eh R/W External Temp High Limit High Byte External Temp Low Limit High Byte External Temperature Force Page 35 R/W Page 35 0Ch R/W Page 35 0Fh 10h 11h R/W R R/W One Shot External Diode Temperature Low Byte Scratchpad 00h 00h 00h Page 36 Page 32 Page 36 12h R/W Scratchpad 00h Page 36 13h 14h 16h SMSC EMC2101 R/W R/W R/W External Diode High Limit Low Byte External Diode Low Limit Low Byte Alert Mask 00h 00h A4h Page 35 Page 35 Page 36 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 17h 18h DEFAULT VALUE 12h (1.008) 08h R/W R/W R/W REGISTER NAME External Diode Ideality Factor Beta Compensation Factor FUNCTION Sets ideality factor based on diode type Compensates for transistors with various beta factors Fan will be set to full speed if external temp above this value Amount of hysteresis applied to TCRIT Temp (1LSB = 1C) Stores the lower 6 bits of the TACH count. and the TACH configuration bits Stores the upper 8 bits of the TACH count. Stores the lower 6 bits of the TACH Limit Stores the upper 8 bits of the TACH Limit defines polarity of PWM or DAC Sets Spin Up options Sets PWM or DAC value Sets the final PWM Frequency Sets the base PWM frequency Amount of hysteresis applied to Lookup Table Temp (1LSB = 1C) Look Up Table Temperature Setting 1 Associated Fan Setting for Temp Setting 1 Look Up Table Temperature Setting 2 Associated Fan Setting for Temp Setting 2 Look Up Table Temperature Setting 3 Associated Fan Setting for Temp Setting 3 PAGE Page 37 Page 38 19h R/W TCRIT Temp Limit 55h (85C) 0Ah (10C) FFh Page 35 21h R/W TCRIT Hysteresis Page 35 46h R TACH Reading Low Byte Page 39 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh R R/W R/W R/W R/W R/W R/W R/W R/W TACH Reading High Byte TACH Limit Low Byte TACH Limit High Byte FAN Configuration Fan Spin-up Fan Setting PWM Frequency PWM Frequency Divide Lookup Table Hysteresis FFh FFh FFh 20h 3Fh 00h 17h 01h 04h (4C) 7Fh 3Fh 7Fh 3Fh 7Fh 3Fh Page 39 Page 39 Page 39 Page 40 Page 41 Page 42 Page 43 Page 43 Page 44 50h 51h 52h 53h 54h 55h R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) Lookup Table Temp Setting 1 Lookup Table Fan Setting 1 Lookup Table Temp Setting 2 Lookup Table Fan Setting 2 Lookup Table Temp Setting 3 Lookup Table Fan Setting 3 Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Revision 2.53 (03-13-07) 30 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh 5Eh 5Fh BFh FDh FEh FFh DEFAULT VALUE 7Fh 3Fh 7Fh 3Fh 7Fh 3Fh 7Fh 3Fh 7Fh 3Fh 00h 16h or 28h 5Dh 01h R/W R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W (See Note 6.1) R/W R R R Note 6.1 REGISTER NAME Lookup Table Temp Setting 4 Lookup Table Fan Setting 4 Lookup Table Temp Setting 5 Lookup Table Fan Setting 5 Lookup Table Temp Setting 6 Lookup Table Fan Setting 6 Lookup Table Temp Setting 7 Lookup Table Fan Setting 7 Lookup Table Temp Setting 8 Lookup Table Fan Setting 8 Averaging Filter Product ID Manufacturer ID Revision Register FUNCTION Look Up Table Temperature Setting 4 Associated Fan Setting for Temp Setting 4 Look Up Table Temperature Setting 5 Associated Fan Setting for Temp Setting 5 Look Up Table Temperature Setting 6 Associated Fan Setting for Temp Setting 6 Look Up Table Temperature Setting 7 Associated Fan Setting for Temp Setting 7 Look Up Table Temperature Setting 8 Associated Fan Setting for Temp Setting 8 Selects averaging function for external diode ID SMSC REV PAGE Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Page 45 Page 46 Page 47 Page 47 Page 47 The Look Up Table Registers are made Read Only if the PWM Program bit (bit 5) in PWM Configuration Register (4Ah) is set. 6.1 Data Read Interlock When the External Diode High Byte Register is read, the External Diode Low byte is copied into an internal `shadow' register. The user is free to read the low byte at any time and be guaranteed that it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading from an External Diode High Byte Register will automatically refresh this stored low byte data. When the TACH Reading Low Byte Register is read, the TACH Reading high byte is copied into an internal `shadow' register. The user is free to read the high byte at any time and be guaranteed that it will correspond to the previously read low byte. Regardless if the high byte is read or not, reading from the TACH Reading Low Byte Register will automatically refresh this stored high byte data. 6.2 Register Descriptions The registers are described in detail below. A bit entry of a `-' indicates that the bit is not used and will always read 0. SMSC EMC2101 31 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.3 Temperature Data Registers Table 6.2 Temperature Data Registers ADDR. 00h R/W R REGISTER Internal Temperature External Diode Temperature High Byte External Diode Temperature Low Byte B7 Sign B6 64 B5 32 B4 16 B3 8 B2 4 B1 2 B0 1 DEFAULT 00h 01h R Sign 64 32 16 8 4 2 1 00h 10h R 0.5 0.25 0.125 - - - - - 00h As shown in Table 6.2, the internal temperature monitor is stored as an 8-bit value while the external temperature is stored as an 11-bit value. Please note that the internal temperature monitor is limited to the operating temperature limits of the part resulting in a guaranteed range of 0C to 85C. 6.4 Status Register Table 6.3 Status Register ADDR 02h R/W R REGISTER Status B7 BUSY B6 INT_ HIGH B5 EEPROM B4 EXT_ HIGH B3 EXT_ LOW B2 FAULT B1 TCRIT B0 TACH DEFAULT 00h The Status Register is a read only register and returns the operational status of the part. \ If the ALERT / TACH pin is configured as an ALERT output and any of these bits are set to '1' (except the BUSY bit and the FAULT bit), then the ALERT / TACH pin is asserted low (if interrupts are not masked (see Section 6.5). Reading from the Status Register will cause the MASK bit to be set if any bit (other than BUSY and FAULT) have been set. Each bit is automatically cleared when the error condition has been removed, however the internal error condition flags may still be set. The ARA command must be used to clear the ALERT / TACH pin if there are no bits set in the Status Register. In addition, reading from the Status Register will clear all bits. If the error condition persists, then the bits will be reset at the end of the next conversion. When the device is configured in Comparison Mode (see Section 6.23), reading the Status Register will not clear any active status bits (except EEPROM and FAULT). These bits are automatically cleared when the error condition is removed. Bit 7 - Busy - indicates that the ADC is converting - does not trigger an interrupt. Bit 6 - INT_HIGH - Internal temperature has met or exceeded the high limit. Bit 5 - EEPROM - Indicates that the EEPROM could not be found when the device powers up in the Auto-Program Mode (see Section 5.1). This bit only applies to the EMC2102-R. It will always read `0' for the EMC2101 device. Bit 4 - EXT_HIGH - External Diode temperature has exceeded the high limit. Revision 2.53 (03-13-07) 32 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Bit 3 - EXT_LOW - External Diode temperature has fallen below the low limit. Bit 2 - FAULT - A diode fault has occurred on the External Diode. Bit 1 - TCRIT - External Diode Temperature has met or exceeded the TCRIT limit. Bit 0 - TACH - The TACH count has exceeded the TACH Limit. 6.5 Configuration Register Table 6.4 Configuration Register ADDR 03h and 09h R/W R/W REGISTER Configuration B7 MASK B6 STANDBY B5 FAN_ STANDBY B4 DAC B3 DIS_ TO B2 ALT_ TCH B1 TCRIT OVRD B0 QUEUE DEFAULT 00h The configuration register controls the basic functionality of the EMC2101. The bits are described below: Bit 7 - MASK - Masks the ALERT / TACH pin functionality when the device is configured as an ALERT output in Interrupt Mode. This bit is ignored if the ALERT / TACH pin is configured as an ALERT output in Comparator Mode or if it is configured as a TACH input. The internal error condition flags are not affected by setting the MASK bit. Therefore, if the MASK bit is set manually (instead of by reading the Status Register or sending the ARA command), and it is cleared, the ALERT / TACH pin may be reasserted without any apparent error conditions present. It is not recommended that the MASK bit be manually set to clear the ALERT / TACH pin. '0' (default) - The ALERT / TACH pin will be asserted if any bit is set in the Status Register. Once the pin is asserted, it will remain asserted. '1' - the ALERT / TACH pin will be masked and will not generate an interrupt. The Status Register will still be updated normally. Bit 6- STANDBY - Determines operational mode of the device. '0' (default) - Operational mode, monitoring temperatures, updating FAN output '1' - Low power standby mode. In this mode, the Temperature monitor is disabled and the Fan drivers may be disabled depending on the status of the FAN_STANDBY bit. Bit 5 - FAN_STANDBY - Determines the operation of the FAN driver when the device is put into low power standby mode. '0' (default) - FAN output will remain active when the STANDBY bit is set. `1' - FAN output will be inactive when the STANBDY bit is set. The driver will be set at the default drive based on the pull-up resistors on the ALERT / TACH pin (see Table 5.1). Bit 4 - DAC - Determines FAN output mode '0' (default) - PWM output enabled at FAN pin. '1' - DAC output enabled at FAN pin. Bit 3 - DIS_TO - disables the SMBus Time-out functionality. `0' (default) - the SMBus Time-out functionality is enabled and will reset the client block if the clock is held in a single state for more than 25ms and less than 35ms. `1' - the SMBus Time-out functionality is disabled. The client block will only reset if it receives a STOP bit. Bit 2 - ALT_TCH - Determines the functionality of the ALERT / TACH pin. `0' (default) - The ALERT / TACH pin will function as an open drain, active low interrupt. SMSC EMC2101 33 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet `1' - The ALERT / TACH pin will function as a high impedance TACH input. This may require an external pull-up resistor to set the proper signaling levels. Bit 1 - TCRITOVRD - Allows the TCRIT limit to be overridden. '0' (default) - TCRIT limit is set to default value and locked. '1' - The TCRIT limit is unlocked for modification. The TCRIT limit can only be changed once. To adjust TCRIT again, a power cycle is required. Bit 0 - QUEUE - Sets the number of external diode over-temp measurements required to assert ALERT / TACH pin. '0' (default) - ALERT / TACH pin is asserted (and status bit set) after one external temperature measurement exceeds the high limit or the TCRIT limit or drops below the low limit. '1' - ALERT / TACH pin is asserted (and status bit set) after three consecutive external temperature measurements exceed the high limit or the TCRIT limit or drop below the low limit. 6.6 Conversion Rate Register Table 6.5 Conversion Rate Register ADDR. 04h and 0Ah R/W R/W REGISTER Conversion Rate B7 - B6 - B5 - B4 - B3 CONV3 B2 CONV2 B1 CONV1 B0 CONV0 DEFAULT 08h Bits 3- 0 - CONV[3:0] - The Conversion Rate Register controls the conversion rate per Table 6.6. Table 6.6 Conversion Rates CONV[3:0] 3 0 0 0 0 0 0 0 0 1 1 2 0 0 0 0 1 1 1 1 0 0 all others 1 0 0 1 1 0 0 1 1 0 0 0 0 1 0 1 0 1 0 1 0 1 CONVERSIONS PER SECOND 1/16 1/8 1/4 1/2 1 2 4 8 16 (default) 32 32 Revision 2.53 (03-13-07) 34 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.7 Temperature Limit Registers Table 6.7 Temperature Data Registers ADDR 05h and 0Bh 07h and 0Dh 08h and 0Eh 13h 14h 19h 21h R/W R/W R/W R/W R/W R/W R/W R/W REGISTER Internal Temp Limit External Diode High Limit MSB External Diode Low Limit MSB External Diode High Limit LSB External Diode Low Limit LSB TCRIT Temp Limit TCRIT Hysteresis B7 0.5 0.5 - B6 64 64 64 0.25 0.25 64 64 B5 32 32 32 0.125 0.125 32 32 B4 16 16 16 16 16 B3 8 8 8 8 8 B2 4 4 4 4 4 B1 2 2 2 2 2 B0 1 1 1 1 1 DEFAULT 46h (70C) 46h (70C) 00h (0C) 00h 00h 55h (85C) 0Ah (10C) The EMC2101 has two 8-bit limit registers, two 11-bit limit registers, and one hysteresis register. The limits are checked after every temperature conversion. If the measured temperature for the internal diode exceeds the Internal Temperature limit, then the INT_HIGH bit is set in the Status Register. It will remain set until the internal temperature drops below the high limit. If the measured temperature for the External Diode exceeds the 11-bit External Diode High Limit, or drops below the 11-bit External Diode Low Limit, then the appropriate status bit will be set. The status bit will remain set until the temperature is no longer violating the respective limits. If the External Diode exceeds the TCRIT Temp Limit (even if it does not exceed the External Diode Temperature Limit), the TCRIT bit will be set in the Status Register. The TCRIT bit will remain set in the Status Register until the External Diode Temperature drops below a lower threshold given by equation [2]. TEMP = ( T CRIT - T CRITHYS ) See Section 6.3 and Section 6.5 for ALERT / TACH pin functionality. [2] 6.8 External Temperature Force Register Table 6.8 External Diode Force Register ADDR. 0Ch R/W R/W REGISTER External Temperature Force B7 Sign B6 64 B5 32 B4 16 B3 8 B2 4 B1 2 B0 1 DEFAULT 00h SMSC EMC2101 35 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet The External Diode Force Register is used to force the Fan Control Look-Up Table to a specific fanspeed setting. When this function is enabled (see Section 6.16), the contents of this register are compared against the temperature thresholds in the Fan Control Look-Up Table to determine the fan setting to use. The contents of this register represent temperature data in the same format as the data registers and can be updated at any time. The External Diode Temperature Registers are updated normally with the measured temperature and compared against the THIGH and TCRIT limits normally but not used to determine the fan speed. APPLICATION NOTE: This mode is used if the host or system requires temperature data from a source other than the EMC2101 External Diode to be used for fan control. 6.9 One Shot Register Table 6.9 One Shot Register ADDR. 0Fh R/W W REGISTER One Shot B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 00h Writing to this register initiates a one shot update of the temperature data. Data is not relevant and is not stored. The One Shot Register initiates an update of the temperature measurements. This register can be written at any time, however will only perform a one-shot conversion when the temperature monitoring is in standby mode. When the one shot temperature conversion is complete the temperature data registers are updated and the fan setting is updated if necessary. This register is self-clearing. 6.10 Scratchpad Registers Table 6.10 Scratchpad Registers ADDR. 11h 12h R/W R/W R/W REGISTER Scratchpad Scratchpad B7 B7 B7 B6 B6 B6 B5 B5 B5 B4 B4 B4 B3 B3 B3 B2 B2 B2 B1 B1 B1 B0 B0 B0 DEFAULT 00h 00h The Scratchpad Registers are R/W registers that perform no function. They are included for software compatibility. 6.11 Alert Mask Register Table 6.11 Alert Mask Register ADDR. 16h R/W R/W REGISTER Alert Mask B7 1 B6 INT_ MSK B5 1 B4 HIGH MSK B3 LOW_ MSK B2 1 B1 TCRIT_ MSK B0 TACH_ MSK DEFAULT A4h The Alert Mask Register enables interrupts from the temperature monitors and limits. Regardless of the condition of the individual mask bits, the Status Register will be updated normally. Revision 2.53 (03-13-07) 36 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Bit 6 - INT_MSK - Disables interrupts for the Internal Diode. `0' (default) - The Internal Diode will generate an interrupt if its measured temperature exceeds the Internal Diode high limit. `1' - the Internal Diode will not generate interrupts. Bit 4 - HIGH_MSK - Disables interrupts for the External Diode high limit. `0' (default) - The External Diode will generate an interrupt if its measured temperature exceeds the External Diode high limit. `1' - the External Diode will not generate an interrupt when the high limit is exceeded. Bit 3 - LOW_MSK - Disables interrupts for the External Diode low limit. `0' (default) - The External Diode will generate an interrupt if its measured temperature drops below the External Diode low limit. `1' - the External Diode will not generate an interrupt when the temperature drops below the low limit. Bit 1 - TCRIT_MSK - Disables interrupts for the TCRIT Limit. `0' (default) - An interrupt will be generated if the External Diode Temperature exceeds TCRIT. `1' - An interrupt will not be generated if TCRIT is exceeded. Bit 0 - TACH_MSK - Disables interrupts for the TACH Limit. `0' (default) - An interrupted will be generated if the measured TACH value exceeds the TACH Limit (indicating that the fan speed is too slow). `1' - An interrupt will not be generated if the TACH limit is exceeded. 6.12 External Ideality Factor Register Table 6.12 External Ideality Factor Register ADDR. 17h R/W R/W REGISTER External Ideality Factor B7 - B6 - B5 B4 B3 B2 B1 B0 DEFAULT 12h IDCF[5:0] This register stores the ideality factor that is automatically applied to the external diode. The Ideality factor is a 6 bit value that allows for a bi-directional trim centered on an ideality factor of 1.008. Table 6.13 defines each setting and the corresponding Ideality factor. Table 6.13 Ideality Factor Look-Up Table SETTING 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh SMSC EMC2101 FACTOR 0.9949 0.9962 0.9975 0.9988 1.0001 1.0014 1.0027 SETTING 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 37 FACTOR 1.0159 1.0172 1.0185 1.0200 1.0212 1.0226 1.0239 SETTING 28h 29h 2Ah 2Bh 2Ch 2Dh 2Eh FACTOR 1.0371 1.0384 1.0397 1.0410 1.0423 1.0436 1.0449 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.13 Ideality Factor Look-Up Table (continued) SETTING 0Fh 10h 11h 12h 13h 14h 15h 16h 17h FACTOR 1.0040 1.0053 1.0066 1.0080 1.0093 1.0106 1.0119 1.0133 1.0146 SETTING 1Fh 20h 21h 22h 23h 24h 25h 26h 27h FACTOR 1.0253 1.0267 1.0280 1.0293 1.0306 1.0319 1.0332 1.0345 1.0358 SETTING 2Fh 30h 31h 32h 33h 34h 35h 36h 37h FACTOR 1.0462 1.0475 1.0488 1.0501 1.0514 1.0527 1.0540 1.0553 1.0566 6.13 Beta Compensation Register Table 6.14 Beta Compensation Register ADDR. 18h R/W R/W REGISTER Beta Compensation B7 - B6 - B5 - B4 - B3 ENABLE B2 B1 B0 DEFAULT 08h BETA[2:0] This register is used to set the Beta Compensation factor that is used for the External Diode channel. When using a diode-connected transistor (such as the 2N3904) or CPUs that implement the thermal diode as a two-terminal diode, the CPU compensation circuit must be disabled by writing a value of 07h to this register. Bit 3 - ENABLE - enables the Beta Compensation Factor Autodetection Algorithm `0' - the Beta Compensation Factor Autodetection circuitry is disabled. The External Diode will always use the Beta Compensation factor set by the BETA[2:0] bits. `1' (default) - the Beta Compensation Factor Autodetection circuitry is enabled. At the beginning of every conversion, the circuitry will determine the optimal Beta Compensation factor setting and use the detected setting. The value of the BETA[2:0] bits will be ignored. Bit 2-0 - BETA[2:0] - selects the Beta Compensation factor that the External Diode will use if the autodetection circuitry is disabled. Table 6.15 shows the setting that should be used based on the expected beta value of the substrate transistor connected to the External Diode channel. Care should be taken when setting the BETA[2:0] bits. If the Beta Compensation factor is set at a beta value that is higher than the transistor beta, then the circuit may introduce measurement errors. Table 6.15 CPU Beta Values ENABLE 0 0 0 Revision 2.53 (03-13-07) B2 0 0 0 B1 0 0 1 38 B0 0 1 0 MINIMUM BETA 0.11 0.18 0.25 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.15 CPU Beta Values (continued) ENABLE 0 0 0 0 0 1 B2 0 1 1 1 1 X B1 1 0 0 1 1 X B0 1 0 1 0 1 X MINIMUM BETA 0.33 0.43 1.00 2.33 Disabled Automatic detection 6.14 TACH Reading Registers Table 6.16 TACH Reading Registers ADDR 46h 47h R/W R R REGISTER TACH Reading Low Byte TACH Reading High Byte B7 TACH7 (128) TACH15 (32768) B6 TACH6 (64) TACH14 (16384) B5 TACH5 (32) TACH13 (8192) B4 TACH4 (16) TACH12 (4096) B3 TACH3 (8) TACH11 (2048) B2 TACH2 (4) TACH10 (1024) B1 TACH1 (2) TACH9 (512) B0 TACH0 (1) TACH8 (256) DEFAULT FFh FFh The TACH Registers hold the 16-bit TACH Reading. This reading represents the number of TACH counts detected. The RPM of the fan can be determined by Equation [3] (see also Appendix B). The bit weighting of each TACH[15:0] bit is shown in parenthesis after the value. When determining the final fan speed, the TACH[15:0] bits need to be decoded into an equivalent decimal number. 5, 400, 000 RPM = ------------------------------------------TACH_COUNT Where: TACH_COUNT is the decimal representation of the TACH[13:0] bits. [3] 6.15 TACH Limit Registers Table 6.17 TACH Reading Low Byte Register ADDR 48h 49h R/W R/W R/W REGISTER TACH Limit Low Byte TACH Limit High Byte B7 TACH_ L7 TACH_ L15 B6 TACH_ L6 TACH_ L14 B5 TACH_ L5 TACH_ L13 B4 TACH_ L4 TACH_ L12 B3 TACH_ L3 TACH_ L11 B2 TACH_ L2 TACH_ L10 B1 TACH_ L1 TACH_ L9 B0 TACH_ L0 TACH_ L8 DEFAULT FFh FFh The TACH Limit Registers store the maximum TACH count that the fan is expected to operate at. TACH count is inversely proportional to the actual fan speed. This limit is used to guarantee that the fan has spun up properly. If the measured TACH is higher than this limit (indicating that the fan speed is lower than the minimum RPM value), then the TACH bit is set in the Status Register. Additionally if the measured TACH count exceeds this limit, depending on the status of the TACH_M[1:0] bits (see Section 6.16), the TACH reading registers may be forced to FFFFh. SMSC EMC2101 39 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.16 Fan Configuration Register Table 6.18 Fan Configuration Register ADDR. 4Ah R/W R/W REGISTER Fan Config B7 - B6 FORCE B5 PROG B4 POLARITY B3 CLK_ SEL B2 CLK_ OVR B1 B0 DEFAULT 20h TACH_M[1:0] The Fan Configuration Register enables the Fan Control Look-Up Table and polarity of the PWM signal driving the output. Bit 6 - FORCE - enables the External Temperature Force Register. This bit is not used if the Fan Control Look-Up Table is not used. `0' (default) - the External Diode Force Register is not used. The measured External Diode temperature is used to determine the position in the Fan Control Look-Up Table. `1' - the External Temperature Force Register is used. When determining the position in the Fan Control Look-Up Table, the contents of the External Temperature Force Register will be used instead of the measured External Diode temperature. All limits will be checked against the measured External Diode temperature as normal. Bit 5 - PROG - enables the Fan Control Look-Up Table for update and sets fan driver output based on Fan Control Look-Up Table values. `0' - the Fan Setting Register and Fan Control Look-Up Table Registers are read-only and the Fan Control Look-Up Table Registers will be used. `1' (default) - the Fan Setting Register and Fan Control Look-Up Table Registers can be written. The value written into the Fan Setting Register will be instantly applied to the fan driver and the Fan Control Look-Up Table will not be used. Bit 4 - POLARITY- sets the polarity of the Fan output driver. For the EMC2101-R, the value of this bit is determined by the value of the pull-up resistor on the ALERT / TACH pin (see Table 5.1). When the PWM default value is set at 100% duty cycle, the default value is set to `1' and when the PWM default value is set to 0% duty cycle, the default value is set to `0'. This occurs within 10ms after power-up. `0' (default - EMC2101) - The polarity of the Fan output driver is non-inverted. A `00h' setting will correspond to a 0% duty cycle or minimum DAC output voltage. `1' - The polarity of the Fan output driver is inverted. A `00h' setting will correspond to a 100% duty cycle or maximum DAC output voltage. Bit 3 - CLK_SEL - Determines the base clock that is used to determine the final PWM frequency. `0' (default) - The base clock that is used to determine the PWM frequency is 360kHz. `1' - The base clock that is used to determine the PWM frequency is 1.4kHz. Bit 2 - CLK_OVR - Overrides the CLK_SEL bit and uses the Frequency Divide Register to determine the base PWM frequency. It is recommended that this bit be set for maximum PWM resolution. `0' (default) - The base clock frequency for the PWM is determined by the CLK_SEL bit. `1' (recommended) - The base clock that is used to determine the PWM frequency is set by the Frequency Divide Register Bit 1-0 - TACH_M[1:0] - Determines the basic operation of the tachometer input as shown in Table 6.19. Revision 2.53 (03-13-07) 40 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.19 TACH Modes TACH_M[1] TACH_M[0] TACH MODE False readings when under minimum detectable RPM (TACH Limit). (Default condition - See Note 6.2) 0 1 1 Note 6.2 1 0 1 When the PWM base clock is set at 360kHz mode 00b is used regardless of the setting of the TACH_M[1:0] bits. FFFFh reading when under minimum detectable RPM. 0 0 6.17 Fan Spin Up Configuration Register Table 6.20 Fan Spin Up Configuration Register ADDR. 4Bh R/W R/W REGISTER Fan Spin Up Config B7 - B6 - B5 FAST_ TACH B4 B3 B2 B1 B0 DEFAULT 3Fh SPIN_DRIVE[1:0] SPIN_TIME[2:0] The Fan Spin Up Configuration register controls the spin-up behavior of the device. The Fan driver enters its spin-up routine any time it transitions from a minimum fan setting (00h) to a higher fan setting (but does not invoke the spin-up routine upon power up). Once the spin-up time has been met, the fan driver is reduced to the programmed setting. Bit 5 - FAST_TACH - Determines whether the Spin-Up routine aborts when the measured TACH is less than the TACH Limit. `0' - The Spin-Up routine uses the duty cycle and spin-up time independently of the TACH reading. `1' (default) - The Spin-Up routine will abort when the TACH measurement is less than the TACH Limit or the programmed Spin-Up time is met, whichever is less. In this case, the SPIN_DRIVE[1:0] bits are ignored and the drive will always be at 100%. APPLICATION NOTE: This bit will be ignored if the ALT_TCH bit in the Configuration Register (see Section 6.5) is set to `0'. APPLICATION NOTE: If the SPIN_TIME[2:0] bits are set at 000b, then the Spin-Up Routine is bypassed regardless of the status of this bit. Bit 4 - 3 SPIN_DRIVE[1:0] - Determines the setting of the drive circuit during the Spin-Up routine according to Table 6.21. Table 6.21 Spin-Up Drive SPIN_DRIVE[1:0] 1 0 SMSC EMC2101 0 0 SPIN UP DRIVE 0 - Spin-Up Cycle bypassed 41 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.21 Spin-Up Drive SPIN_DRIVE[1:0] 1 0 1 1 0 1 0 1 50% (half drive) 75% (3/4 drive) 100% (full drive) (default) SPIN UP DRIVE Bit 2-0 - SPIN_TIME[2:0] - determines the length of time that the fan drive will remain at the SPIN_DRIVE[1:0] setting as shown in Table 6.22. Table 6.22 Spin-Up Time SPIN_TIME[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 SPIN UP TIME 0 - Spin-Up Cycle bypassed 0.05 sec. 0.1 sec. 0.2 sec. 0.4 sec. 0.8 sec. 1.6 sec. 3.2 sec. (default) 6.18 Fan Setting Register Table 6.23 Fan Setting Register ADDR. R/W R/W (see text) REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 4Ch Fan Setting - - 32 16 8 4 2 1 00h The Fan Setting Register drives the fan driver when the Fan Control Look-Up Table is not used (see Section 6.16). Any data written to the Fan Setting registers is applied immediately to the fan driver (PWM or DAC). When the Fan Control Look-Up Table is being used, any writes to this register will be ignored. If the Fan Control Look-Up Table is disabled, then the fan drive will be set at the last value that was used by the Fan Control Look-Up Table. When the Fan Control Look-Up Table Registers are being used, the register is read-only. The register applies to the fan driver in both PWM and DAC operating modes. The DAC output is determined by equation [4] below. Revision 2.53 (03-13-07) 42 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet FAN_SETTING FAN = -------------------------------------------- x V DD 64 [4] These values are independent of the POLARITY bit (see Section 6.16). Therefore, a value of 00h in the Fan Setting Register will always refer to minimum output drive while a setting of 3Fh in the Fan Setting Register will always refer to maximum output drive. APPLICATION NOTE: The output of the DAC driver is dependent upon the current load. With a low current load, the output will be from 0V to an LSB (approximately 52mV at VDD = 3.3V) below VDD with a maximum of 64 linear steps. 6.19 PWM Frequency Register Table 6.24 PWM Frequency Register ADDR. 4Dh R/W R/W REGISTER PWM Frequency B7 - B6 - B5 - B4 B3 B2 B1 B0 DEFAULT 17h PWM_F[4:0] The PWM Frequency Register determines the final PWM frequency and "effective resolution" of the PWM driver. It has no affect on the DAC output resolution. It is recommended that this register be set at 1Fh for maximum resolution. See Appendix A for full operation of the PWM_F register and its interactions with the PWM Resolution and Duty Cycle 6.20 PWM Frequency Divide Register Table 6.25 PWM Frequency Divide Register ADDR. 4Eh R/W R/W REGISTER PWM Frequency Divide B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 01h PWM_D[7:0] This register holds an alternate PWM Frequency divide value that can be used instead of the CLK_SEL bit function. This register can be written at any time, however unless the CLK_OVR bit is set to a logic `1', it is not used. When the CLK_OVR bit is set to a logic `1', the PWM Frequency Divide Register is used in conjunction with the PWM Frequency Register to determine the final PWM frequency that the load will see. When the CLK_OVR bit is set to a logic `0', the setting of this register is not changed and is not used to determine the effective PWM frequency. The PWM frequency when the PWM Frequency Divide Register is used is shown in Equation [5]. SMSC EMC2101 43 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Where: PWM_F is the setting of the PWM Frequency register (4Dh) 360k 15806PWM_D = ------------------------------- x ---------------- = --------------- 2 x PWM_F FREQ FREQ PWM_D is the setting of the PWM Frequency Divide Register (4Eh) FREQ is the desired PWM Frequency Maximum resolution is achieved by setting the PWM Frequency Register to 1Fh. With maximum resolution, the desired PWM frequency can be achieved by adjusting the PWM Frequency Divide Register setting (PWM_D[7:0]) as shown in Table 6.26. For example, if the user desires a 30Hz PWM frequency with maximum PWM resolution, then the PWM_F[4:0] bits should be set at 1Fh (31d) and the the PWM_D bits should be set at C1h (193d). [5] Table 6.26 Examples of Fan PWM Frequency with Maximum Resolution PWM_F[4:0] = 1Fh EFFECTIVE DUTY CYCLE (AT 50% FAN_SETTING) 51.6% 51.6% 51.6% 51.6% 51.6% 51.6% 51.6% EFFECTIVE DUTY CYCLE (AT 75% FAN_SETTING) 77.4% 77.4% 77.4% 77.4% 77.4% 77.4% 77.4% PWM_D[7:0] SETTING 01h 11h 20h 47h C0 C1 FFh EFFECTIVE RESOLUTION (%) 1.61 1.61 1.61 1.61 1.61 1.61 1.61 FAN_SETTING TO GET 75% DUTY CYCLE 2Eh (74.2%) 2Eh (74.2%) 2Eh (74.2%) 2Eh (74.2%) 2Eh (74.2%) 2Eh (74.2%) 2Eh (74.2%) EFFECTIVE PWM FREQUENCY (HZ) 5806.5 341.6 181.5 81.8 30.2 30.0 22.7 6.21 Fan Control Look-Up Table Hysteresis Register Table 6.27 Look Up Table Hysteresis Register ADDR. 4Fh R/W R/W REGISTER Fan Control LookUp Table Hysteresis B7 - B6 - B5 - B4 16 B3 8 B2 4 B1 2 B0 1 DEFAULT 04h (4C) The Fan Control Look-Up Table Hysteresis Register determines the amount of hysteresis applied to the temperature inputs of the fan control Fan Control Look-Up Table. See Section 5.6.4. Revision 2.53 (03-13-07) 44 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.22 Fan Control Look-Up Table Registers Table 6.28 Fan Control Look Up Table Registers R/W Note 6.3 R/W R/W ADDR. 50h 51h REGISTER Fan Control LookUp Table T1 Fan Control LookUp Table S1 Fan Control LookUp Table T2 Fan Control LookUp Table S2 Fan Control LookUp Table T3 Fan Control LookUp Table S3 Fan Control LookUp Table T4 Fan Control LookUp Table S4 Fan Control LookUp Table T5 Fan Control LookUp Table S5 Fan Control LookUp Table T6 Fan Control LookUp Table S6 Fan Control LookUp Table T7 Fan Control LookUp Table S7 Fan Control LookUp Table T8 Fan Control LookUp Table S8 B7 0 - B6 64 - B5 32 32 B4 16 16 B3 8 8 B2 4 4 B1 2 2 B0 1 1 DEFAULT 7Fh 3Fh 52h 53h R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 54h 55h R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 56h 57h R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 58h 59h R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 5Ah 5Bh R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 5Ch 5Dh R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh 5Eh 5Fh R/W R/W 0 - 64 - 32 32 16 16 8 8 4 4 2 2 1 1 7Fh 3Fh Note 6.3 When the PROG bit in the Fan Configuration Register (see Section 6.16) is set to `0', these registers become read only. SMSC EMC2101 45 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet The table should be loaded with the lowest temperature in the T1 register (50h) and increasing in temperature for all settings. See Section 5.6.4 for description of the Fan Control Look Up Table operation. The fan speed settings for each temperature threshold follow the same behavior as the Fan Setting Register (see Section 6.18). 6.23 Averaging Filter Register Table 6.29 Averaging Filter Register ADDR. BFh R/W R/W REGISTER Averaging Filter B7 - B6 - B5 - B4 - B3 - B2 B1 B0 ALERT_ COMP DEFAULT 00h FILTER[1:0] The Averaging Filter Register controls the level of digital averaging that is used for the External Diode temperature measurements as well as the configuration of the ALERT / TACH pin functionality. Bit 2 - 1 - FILTER[1:0] - control the level of digital filtering that is applied to the External Diode temperature measurements as shown in Table 6.30. See Figure 5.5 and Figure 5.6 for examples on the filter behavior. Table 6.30 Averaging Settings FILTER[1:0] 1 0 0 1 1 0 0 1 0 1 Disabled (default) Level 1 Level 1 Level 2 AVERAGING Bit 0 - ALERT_COMP - determines the functionality of the ALERT / TACH pin. `0' (default) - the ALERT / TACH pin is configured to act as an interrupt (see Section 5.4.2). `1' - the ALERT / TACH pin is configured to operate as a temperature comparator (see Section 5.4.1). Revision 2.53 (03-13-07) 46 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet 6.24 Product ID Register Table 6.31 Product ID Register ADDR . R/W REGISTER B7 0 B6 0 0 B5 0 1 B4 1 0 B3 0 1 B2 1 0 B1 1 0 B0 0 0 DEFAULT 16h (EMC2101) 28h (EMC2101-R) FDh R Product ID Register 0 The Product ID Register contains a unique 8 bit word that identifies the product. 6.25 Manufacturer ID Register (FEh) Table 6.32 Manufacturer ID Register ADDR. FEh R/W R REGISTER SMSC ID Register B7 0 B6 1 B5 0 B4 1 B3 1 B2 1 B1 0 B0 1 DEFAULT 5Dh The Manufacturer ID register contains an 8 bit word that identifies the SMSC as the manufacturer of the EMC2101. 6.26 Revision Register (FFh) Table 6.33 Revision Register ADDR. FFh R/W R REGISTER Revision Register B7 0 B6 0 B5 0 B4 0 B3 0 B2 0 B1 0 B0 1 DEFAULT 01h The Revision register contains an 8 bit word that identifies the die revision. SMSC EMC2101 47 Revision 2.53 (03-13-07) DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Appendix A Advanced PWM Options The PWM Frequency Register determines the number of clocks (set by the CLK_SEL bit or the PWM_D register settings) represent 1/2 of the period of the final PWM output waveform. Therefore, as the PWM Frequency Register is updated, the PWM frequency is likewise updated. However, it also directly affects the PWM Resolution and PWM duty cycle. The PWM frequency is set according to Equation [8] or Equation [9] or, if the PWM Divide Register is used, Equation [5]. The PWM Frequency Register does not affect the Fan Setting (either the Fan Setting Register or the Fan Setting entries in the Fan Control Look-up Table Registers). The Fan Setting Register determines the number of clocks that the PWM output is high for is always based on 64 time steps for a PWM cycle. As the PWM Frequency Register changes (or the Fan Setting changes) the effective duty cycle will vary according to Equation [6] and the PWM resolution will vary according to Equation [7]. This is a result of the "on" time determined by Fan Setting changing with respect to the overall PWM period determined by the PWM Frequency Register. APPLICATION NOTE: If the Fan Setting is set at a value that is higher than 2x the PWM Frequency Register settings, the PWM output will be at 100% duty cycle. Table 6.34 shows the effective resolution, duty cycle, and frequency as the PWM Frequency Register setting is changed. FAN_SETTING EFFECTIVE_DUTY_CYCLE = -------------------------------------------- x 100% PWM_F x 2 Where: PWM_F is the setting of the PWM Frequency Register (4Dh) [6] 100% EFFECTIVE_RESOLUTION = ------------------------------PWM_F x 2 Where: PWM_F is the setting of the PWM Frequency Register (4Dh) [7] 360k PWM_FREQUENCY = ----------------------------2xPWM_F Where: PWM_F is the setting of the PWM Frequency register (4Dh) PWM_D is the setting of the PWM Frequency Divide Register (4Eh) CLK_SEL = `0' [8] 1.4k PWM_FREQUENCY = ----------------------------2xPWM_F CLK_SEL = `1' [9] Revision 2.53 (03-13-07) 48 SMSC EMC2101 DATASHEET SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.34 Fan Effective Duty Cycle Resolution and Frequency EFFECTIVE DUTY CYCLE (AT 75% FAN_SETTING) EFFECTIVE DUTY CYCLE (AT 50% FAN_SETTING) PWM_F [4:0] SETTING 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h EFFECTIVE RESOLUTION (%) FAN_SETTING TO GET 75% DUTY CYCLE PWM FREQUENCY AT 360KHZ BASE FREQUENCY (KHZ) PWM FREQUENCY AT 1.4KHZ BASE FREQUENCY (HZ) Setting 00h is mapped to setting 01h 50.00 25.00% 16.67% 12.50% 10.00% 8.33% 7.14% 6.25% 5.56% 5.00% 4.54% 4.17% 3.84% 3.57% 3.33% 3.13 2.94 2.78 2.63 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 94.1% 88.9% 84.2% 01h (50%) 03h (75%) 04h (66.7%) 06h (75%) 07h (70%) 09h (75%) 0Ah (71.4%) 0Ch (75%) 0Dh (72.5) 0Fh (75%) 11h (77.3%) 12h (75%) 14h (76.9%) 15h (75%) 16h (73.3%) 18h (75.0%) 19h (73.5%) 1Bh (75.0%) 1Ch (73.7%) 180.0 90.0 60.0 45.0 36.0 30.0 25.7 22.5 20.0 18.0 16.4 15.0 13.8 12.8 12.0 11.25 10.68 10.00 9.47 704.2 350.0 233.3 175.0 140.0 49 DATASHEET SMSC EMC2101 116.7 100.0 87.5 77.8 70.0 63.7 58.3 53.8 50.0 46.7 44.0 41.4 39.1 37.1 Revision 2.53 (03-13-07) Table 6.34 Fan Effective Duty Cycle Resolution and Frequency (continued) EFFECTIVE DUTY CYCLE (AT 75% FAN_SETTING) 100% 100% 100% 100% 100% 96% 92.3% 88.9% 85.7% 82.8% 80.0% 77.4% EFFECTIVE DUTY CYCLE (AT 50% FAN_SETTING) 80.0% 76.2% 72.7% 69.7% 66.7% 64.0% 61.5% 59.3% 57.1% 55.2% 53.3% 51.6% Revision 2.53 (03-13-07) 50 DATASHEET SMSC EMC2101 Datasheet SMBus Fan Control with 1C Accurate Temperature Monitoring PWM_F [4:0] SETTING 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh EFFECTIVE RESOLUTION (%) 2.50 2.38 2.27 2.17 2.08 2.00 1.92 1.85 1.79 1.72 1.67 1.61 FAN_SETTING TO GET 75% DUTY CYCLE 1Eh (75.0%) 1Fh (73.8%) 21h (75.0%) 22h (73.9%) 24h (75.0%) 25h (74.0%) 27h (75.0%) 28h (74.1%) 2Ah (75.0%) 2Bh (74.1%) 2Dh (75.0%) 2Eh (74.2%) PWM FREQUENCY AT 360KHZ BASE FREQUENCY (KHZ) 9.00 8.57 8.18 7.83 7.50 7.20 6.92 6.67 6.43 6.21 6.00 5.81 PWM FREQUENCY AT 1.4KHZ BASE FREQUENCY (HZ) 35.2 33.5 32.0 30.6 29.3 28.2 27.1 26.1 25.1 24.3 23.5 22.7 SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet Table 6.35 Example TACH Decode 10k RPM to 1k RPM DEC 512 528 544 560 576 592 608 624 640 656 672 688 704 720 736 752 768 784 800 816 HEX 200h 210h 220h 230h 240h 250h 260h 270h 280h 290h 2A0h 2B0h 2C0h 2D0h 2E0h 2F0h 300h 310h 320h 330h RPM 10547 10227 9926 9643 9375 9122 8882 8654 8438 8232 8036 7849 7670 7500 7337 7181 7031 6888 6750 6618 DEC 1280 1296 1312 1328 1344 1360 1376 1392 1408 1424 1440 1456 1472 1488 1504 1520 1536 1552 1568 1584 HEX 500h 510h 520h 530h 540h 550h 560h 570h 580h 590h 5A0h 5B0h 5C0h 5D0h 5E0h 5F0h 600h 610h 620h 630h RPM 4219 4167 4116 4066 4018 3971 3924 3879 3835 3792 3750 3709 3668 3629 3590 3553 3516 3479 3444 3409 DEC 2048 2064 2080 2096 2112 2128 2144 2160 2176 2192 2208 2224 2240 2256 2272 2288 2304 2320 2336 2352 HEX 800h 810h 820h 830h 840h 850h 860h 870h 880h 890h 8A0h 8B0h 8C0h 8D0h 8E0h 8F0h 900h 910h 920h 930h RPM 2637 2616 2596 2576 2557 2538 2519 2500 2482 2464 2446 2428 2411 2394 2377 2360 2344 2328 2312 2296 DEC 2816 2832 2848 2864 2880 2896 2912 2928 2944 2960 2976 2992 3008 3024 3040 3056 3072 3088 3104 3120 HEX B00h B10h B20h B30h B40h B50h B60h B70h B80h B90h BA0h BB0h BC0h BD0h BE0h BF0h C00h C10h C20h C30h RPM 1918 1907 1896 1885 1875 1865 1854 1844 1834 1824 1815 1805 1795 1786 1776 1767 1758 1749 1740 1731 DEC 3584 3600 3616 3632 3648 3664 3680 3696 3712 3728 3744 3760 3776 3792 3808 3824 3840 3856 3872 3888 HEX E00h E10h E20h E30h E40h E50h E60h E70h E80h E90h EA0h EB0h EC0h ED0h EE0h EF0h F00h F10h F20h F30h RPM 1507 1500 1493 1487 1480 1474 1467 1461 1455 1448 1442 1436 1430 1424 1418 1412 1406 1400 1395 1389 DEC 4352 4368 4384 4400 4416 4432 4448 4464 4480 4496 4512 4528 4544 4560 4576 4592 4608 4624 4640 4656 HEX 1100h 1110h 1120h 1130h 1140h 1150h 1160h 1170h 1180h 1190h 11A0h 11B0h 11C0h 11D0h 11E0h 11F0h 1200h 1210h 1220h 1230h RPM 1241 1236 1232 1227 1223 1218 1214 1210 1205 1201 1197 1193 1188 1184 1180 1176 1172 1168 1164 1160 SMSC EMC2101 51 DATASHEET Revision 2.53 (03-13-07) Appendix B TACH Reference Table Table 6.35 Example TACH Decode 10k RPM to 1k RPM DEC 832 848 864 880 896 912 928 944 960 976 Revision 2.53 (03-13-07) 52 DATASHEET SMSC EMC2101 Datasheet SMBus Fan Control with 1C Accurate Temperature Monitoring HEX 340h 350h 360h 370h 380h 390h 3A0h 3B0h 3C0h 3D0h 3E0h 3F0h 400h 410h 420h 430h 440h 450h 460h 470h 480h 490h 4A0h 4B0h RPM 6490 6368 6250 6136 6027 5921 5819 5720 5625 5533 5444 5357 5273 5192 5114 5037 4963 4891 4821 4754 4688 4623 4561 4500 DEC 1600 1616 1632 1648 1664 1680 1696 1712 1728 1744 1760 1776 1792 1808 1824 1840 1856 1872 1888 1904 1920 1936 1952 1968 HEX 640h 650h 660h 670h 680h 690h 6A0h 6B0h 6C0h 6D0h 6E0h 6F0h 700h 710h 720h 730h 740h 750h 760h 770h 780h 790h 7A0h 7B0h RPM 3375 3342 3309 3277 3245 3214 3184 3154 3125 3096 3068 3041 3013 2987 2961 2935 2909 2885 2860 2836 2813 2789 2766 2744 DEC 2368 2384 2400 2416 2432 2448 2464 2480 2496 2512 2528 2544 2560 2576 2592 2608 2624 2640 2656 2672 2688 2704 2720 2736 HEX 940h 950h 960h 970h 980h 990h 9A0h 9B0h 9C0h 9D0h 9E0h 9F0h A00h A10h A20h A30h A40h A50h A60h A70h A80h A90h AA0h AB0h RPM 2280 2265 2250 2235 2220 2206 2192 2177 2163 2150 2136 2123 2109 2096 2083 2071 2058 2045 2033 2021 2009 1997 1985 1974 DEC 3136 3152 3168 3184 3200 3216 3232 3248 3264 3280 3296 3312 3328 3344 3360 3376 3392 3408 3424 3440 3456 3472 3488 3504 HEX C40h C50h C60h C70h C80h C90h CA0h CB0h CC0h CD0h CE0h CF0h D00h D10h D20h D30h D40h D50h D60h D70h D80h D90h DA0h DB0h RPM 1722 1713 1705 1696 1688 1679 1671 1663 1654 1646 1638 1630 1623 1615 1607 1600 1592 1585 1577 1570 1563 1555 1548 1541 DEC 3904 3920 3936 3952 3968 3984 4000 4016 4032 4048 4064 4080 4096 4112 4128 4144 4160 4176 4192 4208 4224 4240 4256 4272 HEX F40h F50h F60h F70h F80h F90h FA0h FB0h FC0h FD0h FE0h FF0h 1000h 1010h 1020h 1030h 1040h 1050h 1060h 1070h 1080h 1090h 10A0h 10B0h RPM 1383 1378 1372 1366 1361 1355 1350 1345 1339 1334 1329 1324 1318 1313 1308 1303 1298 1293 1288 1283 1278 1274 1269 1264 DEC 4672 4688 4704 4720 4736 4752 4768 4784 4800 4816 4832 4848 4864 4880 4896 4912 4928 4944 4960 4976 4992 5008 5024 5040 HEX 1240h 1250h 1260h 1270h 1280h 1290h 12A0h 12B0h 12C0h 12D0h 12E0h 12F0h 1300h 1310h 1320h 1330h 1340h 1350h 1360h 1370h 1380h 1390h 13A0h 13B0h RPM 1156 1152 1148 1144 1140 1136 1133 1129 1125 1121 1118 1114 1110 1107 1103 1099 1096 1092 1089 1085 1082 1078 1075 1071 992 1008 1024 1040 1056 1072 1088 1104 1120 1136 1152 1168 1184 1200 SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet DEC 1216 1232 1248 1264 HEX 4C0h 4D0h 4E0h 4F0h RPM 4441 4383 4327 4272 DEC 1984 2000 2016 2032 HEX 7C0h 7D0h 7E0h 7F0h RPM 2722 2700 2679 2657 DEC 2752 2768 2784 2800 HEX AC0h AD0h AE0h AF0h RPM 1962 1951 1940 1929 DEC 3520 3536 3552 3568 HEX DC0h DD0h DE0h DF0h RPM 1534 1527 1520 1513 DEC 4288 4304 4320 4336 HEX 10C0h 10D0h 10E0h 10F0h RPM 1259 1255 1250 1245 DEC 5056 5072 5088 5104 HEX 13C0h 13D0h 10E0h 13F0h RPM 1068 1065 1061 1058 SMSC EMC2101 53 DATASHEET Revision 2.53 (03-13-07) Table 6.35 Example TACH Decode 10k RPM to 1k RPM Chapter 7 Package Diagrams Revision 2.53 (03-13-07) 54 DATASHEET SMSC EMC2101 Datasheet SMBus Fan Control with 1C Accurate Temperature Monitoring REVISION HISTORY REVISION DESCRIPTION SEE SPEC FRONT PAGE FOR REVISION HISTORY DATE RELEASED BY - 3 D e PIN 1 IDENTIFIER AREA (D/2 X E1/2) 5 c - 3 E1 E 2 8X b SEE DETAIL "A" TOP VIEW END VIEW A2 C A SEATING PLANE A1 ccc C SIDE VIEW 3-D VIEW NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETER. 2. TOLERANCE ON THE TRUE POSITION OF THE LEADS IS 0.065mm MAXIMUM. 3. PACKAGE BODY DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD PROTRUSIONS OR FLASH. MAXIMUM MOLD PROTRUSIONS OR FLASH IS 0.15 mm (0.006 INCHES) PER END AND SIDE. DIMENSIONS "D" AND "E1" ARE DETERMINED AT DATUM PLANE "H". 4. DIMENSION FOR FOOT LENGTH "L" IS MEASURED AT THE GAUGE PLANE 0.25mm ABOVE THE SEATING PLANE. 5. DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. H C 0.25 SEATING PLANE 0 - 8 4 L L1 GAUGE PLANE UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MILLIMETERS AND TOLERANCES ARE: DECIMAL 0.1 X.X X.XX 0.05 X.XXX 0.025 ANGULAR 1 THIRD ANGLE PROJECTION 80 ARKAY DRIVE HAUPPAUGE, NY 11788 USA TITLE DETAIL "A" SCALE: 3/1 DIM AND TOL PER ASME Y14.5M - 1994 MATERIAL NAME DRAWN DATE - S.K.ILIEV CHECKED 7/05/04 7/05/04 SCALE PACKAGE OUTLINE 8 PIN TSSOP, 3x3 MM BODY, 0.65 MM PITCH DWG NUMBER REV FINISH S.K.ILIEV APPROVED MO-8-TSSOP-3x3 STD COMPLIANCE SHEET D 1 OF 1 PRINT WITH "SCALE TO FIT" DO NOT SCALE DRAWING S.K.ILIEV 7/07/04 1:1 JEDEC: MO-187 / D Figure 9.1 8 PIN MSOP / TSSOP Package SMBus Fan Control with 1C Accurate Temperature Monitoring Datasheet REVISION HISTORY REVISION A DESCRIPTION INITIAL RELEASE DATE 7/07/04 RELEASED BY S.K.ILIEV D 3 e SEE DETAIL "A" 8 3 E1 E 1 INDEX AREA (D/2 X E1/2) 2 4 8X b 2 4 c 5 TOP VIEW END VIEW C A2 SEATING PLANE A1 ccc C A SIDE VIEW 3-D VIEW NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETER. 2. TRUE POSITION SPREAD TOLERANCE IS 0.125mm AT MAXIMUM MATERIAL CONDITION. 3. PACKAGE BODY DIMENSION "D" DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MAXIMUM MOLD FLASH, PROTRUSIONS OR GATE BURRS IS 0.15 mm PER END. DIMENSION "E1" DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. MAXIMUM INTERLEAD FLASH OR PROTRUSION IS 0.25 mm PER SIDE. "D1" & "E1" DIMENSIONS ARE DETERMINED AT DATUM PLANE "H". 4. DIMENSIONS "b" & "c" APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10 TO 0.25 mm FROM THE LEAD TIP. 5. THE CHAMFER FEATURE IS OPTIONAL. IF IT IS NOT PRESENT, THEN A PIN 1 IDENTIFIER MUST BE LOCATED WITHIN THE INDEX AREA INDICATED. H 0.25 GAUGE PLANE L L1 0 UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MILLIMETERS AND TOLERANCES ARE: DECIMAL X.X 0.1 X.XX 0.05 X.XXX 0.025 ANGULAR 1 THIRD ANGLE PROJECTION 80 ARKAY DRIVE HAUPPAUGE, NY 11788 USA DETAIL "A" SCALE: 3/1 TITLE DIM AND TOL PER ASME Y14.5M - 1994 MATERIAL NAME DRAWN DATE - S.K.ILIEV CHECKED 7/07/04 7/07/04 PACKAGE OUTLINE 8 PIN SOIC, 3.9mm BODY WIDTH, 1.27mm PITCH DWG NUMBER REV FINISH S.K.ILIEV APPROVED SCALE STD COMPLIANCE SHEET PRINT WITH "SCALE TO FIT" DO NOT SCALE DRAWING S.K.ILIEV 7/07/04 1:1 JEDEC: MS-012 / AA 1 OF 1 Figure 9.2 8 PIN SOIC Package SMSC EMC2101 MO-8-SOIC-4.9x3.9 A 55 DATASHEET Revision 2.53 (03-13-07) |
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